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november 2010 doc id 15447 rev 4 1/37 AN2941 application note 19 v - 75 w smps compliant with latest energy star ? criteria using the l6563s and the l6566a introduction this application note describes the characteristics and the features of a 75 w reference board (p/n evl6566a-75wes4), tailored on specifications of a typical high-end portable computer power supply. the peculiarities of this design are the very high efficiency at light load and the excellent global efficiency for a two-stage architecture. the high efficiency at high load is achieved by not using synchronized rectification at the secondary side and therefore offering a very cost-effective solution. efficiency during active-load and light-load operation are compliant with energy star ? eligibility criteria for both external (epa rev. 2.0 eps) and computer in tegrated (epa rev. 4.0 computers) power supply. in addition this design is even compliant with the latest computer document (epa rev. 5.0 computers) whose effective date is july 2009. figure 1. l6566a and l6563s-75w energy star ? compliant adapter demonstration board (p/n evl6566a-75wes4) www.st.com
contents AN2941 2/37 doc id 15447 rev 4 contents 1 main characteristics and cir cuit description . . . . . . . . . . . . . . . . . . . . . 5 2 efficiency measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 harmonic content measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4 functional check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5 thermal map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6 conducted emission pre-compli ance test . . . . . . . . . . . . . . . . . . . . . . 24 7 bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 8 pfc coil specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 9 transformer specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
AN2941 list of tables doc id 15447 rev 4 3/37 list of tables table 1. overall efficiency comp ared to ?epa rev. 2.0 eps? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 2. overall efficiency co mpared to ?epa rev. 4.0 comp uters? . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 3. overall efficiency co mpared to ?epa rev. 5.0 comp uters? . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 4. output voltage at ovp intervention vs. input voltage and output power . . . . . . . . . . . . . . 22 table 5. thermal maps reference points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 6. bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 7. pfc coil winding data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 table 8. transformer winding data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 table 9. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
list of figures AN2941 4/37 doc id 15447 rev 4 list of figures figure 1. l6566a and l6563s-75w energy star? compliant adapter demonstration board (p/n evl6566a-75wes4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 figure 2. typical transition mode pfc electrical diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. sensorless pfc electrical diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. sensorless pfc operation theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 5. electrical diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 6. light-load efficiency measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 7. evl6566a-75wes4 compliance to en61000-3-2 standard at 230 vac-50 hz, full load . . 15 figure 8. evl6566a-75wes4 compliance to jeita-miti standard at 100 vac-50 hz, full load. . . . 15 figure 9. flyback stage waveforms at 115 v-60 hz - full load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 10. flyback stage waveforms at 230 v -50 hz - full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 11. flyback stage waveforms at 115 v-60 hz - 20 w load . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 12. flyback stage waveforms at 230 v -50 hz - 20 w load . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 13. no-load operation at 90 v-60 hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 14. no-load operation at 265 v-50 hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 15. transition full load to no load at 265 vac-50 hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 16. transition no load to full load at 265 vac-50 hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 17. short-circuit at full load and 230 vac - 50 hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 9 figure 18. short-circuit details at full load and 230 vac - 50 hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 19. evl6566-75wes4 pfc open loop at 115 vac-60 hz - full load . . . . . . . . . . . . . . . . . . . . 20 figure 20. flyback open loop at 230 v-50 hz half load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 21. flyback open loop at 230 v-50 hz half load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 22. flyback open loop - restart option 230 vac 50 hz - half load . . . . . . . . . . . . . . . . . . . . . . . 21 figure 23. thermal map at 115 vac-60 hz - full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 24. thermal map at 230 vac-50 hz - full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 25. ce average measure at 115 vac and full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 26. ce average measure at 230 vac and full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 27. pfc coil electrical diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 28. pfc coil mechanical aspect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 29. transformer electrical diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 30. transformer winding cross view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 figure 31. transformer mechanical aspect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
AN2941 main characteristics and circuit description doc id 15447 rev 4 5/37 1 main characteristics and circuit description the main features of the smps are listed as follows: universal input mains range: 90 264 vac - frequency 45 65 hz output voltage: 19 v at 4 a continuous operation mains harmonics: according to en61000-3-2 class-d or jeita-miti class-d standby mains consumption: < 0.14 w at 230 vac active load average efficiency: better than 87% without synchronous rectification emi: according to en55022-class-b safety: according to en60950 dimensions: 78 x 170 mm, 25 mm maximum height of components pcb: single-side, 70 m, cem-1, mixed pth/smt the circuit is composed of two stages: a front-end pfc using the l6563s and a flyback converter based on the l6566a. the cv/cc controller tsm1014 allows the correct current limitation on the secondary side. the flyback stage works as master and it is dedicated to control the circuit operation including the standby and protections. additionally, it switches on and off the pfc stage by means of a dedicated pin (vcc_pfc), thus helping to achieve an excellent efficiency even at light load, with low complexity. pfc stage the main function of the pfc is to keep the current absorbed from the power line tracking the line voltage to comply with the en61000-3-2 or other similar regulations and to regulate the output voltage of the boost stage powering the downstream converter. therefore, it is necessary to sense the pfc output voltage as well as the input coming from the mains and feed these two signals to the controller. the simplest way to implement these functions is to sense both input and output voltage through two resistor dividers as shown in figure 2. these resistors are in the m range (6.6 m for the input divider and 2 m for the output divider of the example in the figure), however their power dissipation, which is negligible at full load, becomes significant at light load. even if the pfc is turned off at light load, the power dissipation of the two dividers is always there. additionally, at light load both the input and the output voltages become very close to the peak value of the rectified mains because the input and output capacitors act as peak detectors of the rectified mains voltage. considering the worst case for power consumption, once the smps is working at european mains range, the power dissipation of these two dividers can be easily calculated as follows: for example, if we calculate the impact of these losses with a 1 w output load, these two circuits affect the overall efficiency by about 7%. ( ) mw 16 m 6 . 6 2 v 230 r v p 2 mult 2 in mult = ? = = ( ) mw 53 m 2 2 v 230 r v p 2 mult 2 out fb = ? = =
main characteristics and circuit description AN2941 6/37 doc id 15447 rev 4 figure 2. typical transition mode pfc electrical diagram to overcome this problem, in this board a ?sensorless? pfc solution has been implemented ( figure 3 ). the information relevant to input and output voltages is provided to the pfc controller l6563s by an auxiliary winding of the boost inductor. figure 3. sensorless pfc electrical diagram 6.6 mb 2 mb l6563s l6563s
AN2941 main characteristics and circuit description doc id 15447 rev 4 7/37 operation of the ?sensorless pfc? is explained as follows, referring to figure 4 : a) during the mosfet off-time the voltage applied across the boost inductance is the difference between the output and the input voltage. so d 2 is reverse biased and c 2 is charged via d 1 to: where n is the winding turns ratio. b) during the mosfet on-time the voltage applied across the boost inductor is v in (with reversed polarity) so d 1 is reverse biased and the capacitor c 1 is charged via d 2 to a voltage equal to: hence, properly selecting the time constant of the circuit, we can use the voltage across c 1 to feed the multiplier input of the l6563s becau se it is information about the instantaneous value of the input voltage which is needed by the control part to shape the input current. figure 4. sensorless pfc operation theory c) because c 3 is in parallel to the series of c 1 and c 2 , the voltage at which it is charged is proportional to the pfc output voltage and can be used to get the output voltage feedback signal: of course the c 3 time constant has to be signif icantly longer than that of c 1 and c 2 in order to feed a stable feedback signal into the pfc controller error amplifier. n v v v in out 2 ? = n v v in 1 = n v n v n v v v out in in out 3 = + ? =
main characteristics and circuit description AN2941 8/37 doc id 15447 rev 4 during light-load operation the pfc controller is stopped by the pwm controller, so the mosfet doesn?t switch and there is no refl ected voltage on the auxiliary winding. c 1 , c 2 and c 3 are no longer charged and discharged and so both the multiplier and the feedback networks do not dissipate. the divider r3, r5, r11, r10 and r19, direct ly connected to the output voltage, is dedicated to protect the circuit in case of output overvoltage or open loop via pin pfc_ok (#7). tracking boost option to maximize overall efficiency the pfc makes use of the ?track ing boost option?. with this function implemented the pfc dc output voltage changes proportionally to the mains voltage. the l6563s can implement this functi on by just adding a resistor (r30) connected to the dedicated pin (tbo, #6). furthermore, the tracking boost option allows the use of a smaller (and cheaper) inductor. in this case a 400 h inductor has been used while, with a fixed output voltage pfc working at similar operating frequency, a 700 h inductor is needed. fast voltage feed-forward the voltage on the l6563s vff pin (#5) is the peak value of the voltage on mult pin (#3). the rc network (r34, c21) connected to vff co mpletes the peak-holding circuit. this signal is necessary to derive information from the rms input voltage to compensate the loop gain that is mains voltage dependent. generally speaking, if the time constant is to o small, the voltage generated is affected by a considerable amount of ripple at twice the ma ins frequency, causing distortion of the current reference (resulting in high thd and poor pf). if the time constant is too large there is a considerable delay in setting the right amount of feed-forward, resulting in excessive overshoot or undershoot of the pre-regulator's output voltage in response to large line voltage changes. to overcome this issue, the l 6563s implements the new fast vff function. as soon as the voltage on the vff pin decreases from a set threshold (40 mv typically), a mains dip is assumed and an internal switch rapidly discharges the vff capacitor via a 10 k resistor. thanks to this feature it is po ssible to set an rc circuit with a long time constant, assuring a low thd, and keeping a fast response to the mains dip. flyback power stage the downstream converter, acting as the master stage, impl ements the st l6566a (u6), a new dedicated current mode controller. the ic operates in quasi-resonant mode detecting the transformer demagnetization by pin zcd (#11). r42 on pin osc (#13) sets the maximum switching frequency at about 125 khz . this value has been chosen to limit the switching losses. due to the fact that the maximum switching fre quency is imposed, the converter operates in discontinuous conduction mode during light-load operation. thanks to the l6566a valley skipping function, even in this condition, the flyback operate s in valley switching, reducing switching losses. the mosfet is a standard 800 v, stf7nm80, housed in the to-220fp package, needing just a small heat sink. the transformer is layer type, using a standard ferrite size eer35. the transformer, designed according to en60950, is manufactured by tdk. the flyback reflected voltage is ~130 v, providing enough room for the leakage inductance voltage spike with still margin for reliability of the mosfet. the rectifier d8 and the transil d4 clamp the peak of the leakage inductance voltage spike at mosfet turn-off.
AN2941 main characteristics and circuit description doc id 15447 rev 4 9/37 the output rectifiers are two dual center tap schottky diodes (d7 and d5) in parallel. they have been selected according to the maximum reverse voltage, forward voltage drop and power dissipation. the snubber made up of r14, r66 and c8 damps the oscillation produced by the diode capacitance and the l eakage inductance. a small lc filter has been added on the output, filtering the high frequency ripple. d17, r75r78, q10 and q15 implement an output voltage ?fast discharge? circuit, discharging quickly the output capacitors wh en the converter is turned off. it has been implemented to quickly decrease the residual ou tput voltage after the converter is turned off at no load. startup sequence the circuit is designed so that at startup t he flyback starts first, then it turns on the pfc stage controlling the l6563s via the vcc_pfc pin. therefore, the flyback stage is designed to manage at startup the full output power over the entire input voltage range because it must guarantee the regulation of the output voltage even during load transitions when the load is increasing but the pfc is still not yet de livering the nominal output voltage. of course this condition can be ma intained only for a short time, typi cally tens of m illiseconds, because the flyback is not designed to sustain this cond ition from a thermal point of view. the flyback controller l6566a pin #1 (hv) is directly conne cted to the bulk capacitor. at startup, an internal high voltage current source charges c32 and c33 until the l6566a turn-on voltage threshold is reached, then the high voltage curr ent source is automatically switched off. as the ic starts switching it is initially supplied by c32 and c33, then th e transformer auxiliary winding (pins 8-9) provide the voltage to powe r the ic. afterwards, according to the load level monitored by the comp pin, the l6566a activates the l6563s powering it via the vcc_pfc pin. because the l6566a integrated hv startup circui t is turned off and therefore not dissipative during normal operation, it contributes significantly to reducing power consumption when the power supply operates at light load which in turn contributes significantly in meeting worldwide standby standar ds currently required. brownout protection brownout protection prevents t he circuit from working with abnormal mains levels. it can be easily achieved using pin #16 (ac_ok) of t he l6566a. d6, q3, c23, r7, r12, r26, r62 and r64 implement a circuit sensing the mains voltage peak value and feed it into l6566a pin #16. an internal comparator then enables the ic operations if the mains level is correct, within the nominal limits. if the input voltage is below 90 vac the startup of the circuit is inhibited, while the turn-off voltage has been se t at the voltage reached by the bulk capacitor after the hold-up time. the internal comparator has in fact a hysteresis allowing the l6566a turn-on and turn-off voltage to be set independently. sensing the mains voltage before the input rectifier is a less dissipat ive solution with respect to sensing the bulk voltage. in addition it allows faster restart because there is no need to wait for the bulk capacitor to discharge. the l6563s has a similar protection on the run pi n (#10) but in this schematic it is not used because in this architec ture it acts as slave, therefore th e main controls are managed by the flyback stage.
main characteristics and circuit description AN2941 10/37 doc id 15447 rev 4 output voltage feedback loop the output regulation is done by means of two control loops, a voltage and a current loop working alternatively. a dedicated control ic, the tsm1014 (u5), has been used. it integrates two operational amplifiers (used as error amplifiers) and a precise voltage reference. the output signal of the error amplifiers drives an optocoupler sfh617a-4 (u3) to get the required insulation of the secondary side and modulating the voltage on comp pin (#9) of the l6566a. l6566a current mode control and voltage feed-forward function r52 and r53 sense the q5 mosfet current of the flyback and the signal is fed into pin #7 (cs) connected to the pwm comparator. this si gnal is compared with the comp (pin #9) signal which is coming from the optocoupler. the maximum power that the converter can deliver is set by a comparator limiting the peak of the primary current, comparing the cs and an internal threshold (v csx ). if the current signal exceeds the threshold, the comparat or limits the mosfet duty cycle, hence the output power is also limited. because the maximum transferable power depends on both the primary peak current and the input voltage, in order to keep almost con stant the overload set poi nt that would change according to flyback input voltage, the l6566a implements a voltage feed-forward function via a dedicated pin. hence, v csx is modulated by the voltage on pin #15 (v ff ) sensing the bulk voltage by a resistor divider. a higher voltage causes a smaller v cs,max so that the maximum power can be kept almost constant at any input voltage. l6566a short-circuit protection in case of short-circuit, an internal comparat or senses the comp pin after the so ft-start at which time the comp pin goes high, activating an internal current source that restarts charging the soft-start capacitor from the initial 2 v level. if the voltage on this pin reaches 5 v, the l6566a stops the operation and enters in the ?hiccup mode?. the l6566a restarts with a startup sequence when the vcc voltage drops below the v ccrestart level (5 v). because of the long time needed by the v cc capacitor to drop to 5 v, the duration of the no- load operation increases, thus decreasing the power dissipation and the stress of the power components. this sequence is repeated until the short is removed following which normal operation of the converter is automatically resumed. another comparator, whose threshold is 1.5 v and dedicated to protecting the circuit in case of transformer saturation or secondary diodes short, is also provided. if the voltage on the cs pin (#7) exceeds this threshold two cons ecutive times, the ic immediately shuts down and latches off. this is intended to prevent spur ious activation of the protection in case of temporary disturbances, for example during th e immunity tests. even in this case the ic operation is resumed as soon as the v cc voltage drops below 5 v. in this way a hiccup mode operation is still obtained, avoiding consequent failur es due to overheating of the power components. overvoltage protection pin #11 (zcd) is connected to th e auxiliary winding by a resist or divider. it implements the ovp against feedback network failures. when the zcd pin voltage exceeds 5 v the ic is shut down. this protection can be set as latched or auto-restart by the user with no additional components. on the board it is se t as latched, therefore operations can resume after a mains recycling.
AN2941 main characteristics and circuit description doc id 15447 rev 4 11/37 overtemperature protection thermistor r58, connected to l6566a dis pin (# 8), provides for a thermal protection of the flyback mosfet (q5). the l6563s pwm_latc h pin (activated in case of pfc loop failures or pfc inductor saturation) is connecte d to l6566a dis pin too. in case of pfc latching failure, the flyback converter activi ty is latched too. to maintain this state , an internal circuitry of the l6566a monitors the v cc and periodically reactivate s the hv current source to supply the ic, while the l6563s remains ina ctive after latching becau se it is no longer powered via the vcc_pfc pin that has been opened by the internal l6566a logic. standby power savings the l6566a implements a current mode control, thus it monitors the output power by pin comp whose level is proportional to the load. thus, when the voltage on pin comp falls below an internal threshold, the controller is disabled and its consumption reduced. normal operation restarts as soon as the comp voltage rises again. in this way a low consumption burst mode operation is obtained. on this board, because the flybac k stage acts as master , it has been electrically designed to operate over the entire mains voltage range. this solution allows turning off the pfc controller during no-load operation, saving power. as soon as the comp level falls below the burst mode threshold, the l6566a stops supplying the pfc controller, disabling vcc_pfc pin and reducing the pfc consumption to almost zero as already explained, minimizing the overall consumption of the converter.
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AN2941 efficiency measurement doc id 15447 rev 4 13/37 2 efficiency measurement epa rev. 2.0 external power supply compliance ta bl e 1 shows the no-load consumption and the overall efficiency, measured at the nominal mains voltages. as shown, these values are fu lly compliant with the epa rev 2.0 external power supply limits, requiring an average efficiency higher than 87% for output load between 25% and 100% of the nominal load and no-load consumption lower than 500 mw. in particular at no load the power consumption is very low, in fact at 230 vac, it is just 136 mw and at 115 vac it is 83 mw. epa rev. 4.0 computers power supply compliance different from the previous eps regulation, the ?epa rev. 4.0 co mputers? requires a minimum efficiency higher than 80%, measured at 20%, 50% and 100% of nominal load. in ta bl e 2 the comparison of the overall efficiency measurements with the ?epa rev. 4.0 computers? requirements is given. additionally, the ?epa rev.4.0 computers? do cument poses specific limitations to the maximum consumption of computers during st andby mode, sleep mode and idle state but this is not sufficient to deduce the required power supply efficiency because the load applied during these states is not indicated. this information comes from computer manufacturer table 1. overall efficiency co mpared to ?epa rev. 2.0 eps? notes 230 v-50 hz 115 v-60 hz epa2 vout [v] iout [ma] pout [w] pin [w] eff. vout [v] iout [ma] pout [w] pin [w] eff. no-load consumption 19.08 0.00 0.00 0.136 ------ 19.09 0.0 0 0.00 0.083 ------ <0.5w pass 25% load eff. 19.12 980 18.73 22.37 83. 7% 19.10 983 18.76 21.50 87.3% 87.0% 50% load eff. 19.13 1960 37.50 42.87 87. 5% 19.11 1963 37.52 42.12 89.1% 87.0% 75% load eff. 19.16 2936 56.23 63.31 88. 8% 19.13 2942 56.26 63.33 88.8% 87.0% 100% load eff. 19.15 3917 75.01 84.07 89. 2% 19.14 3920 75.00 85.26 88.0% 87.0% average active load eff. 87.3% 88.3% 87.0% pass table 2. overall efficiency compared to ?epa rev. 4.0 computers? notes 230 v-50 hz 115 v-60 hz epa4 vout [v] iout [ma] pout [w] pin [w] eff. vout [v] iout [ma] pout [w] pin [w] eff. 20% load eff. 19.12 785 15.02 18.17 82.6% 19.10 785 14.99 17.39 86.2% 80.0% pass 50% load eff. 19.13 1960 37.50 42.87 87. 5% 19.11 1963 37.52 42.12 89.1% 80.0% pass 100% load eff. 19.15 3917 75.01 84.07 89.2% 19.14 3920 75.00 85.26 88.0% 80.0% pass
efficiency measurement AN2941 14/37 doc id 15447 rev 4 requirements. the major computer manufacturers require efficiency higher than 70% from 1 w to 2 w input power and efficiency higher than 75% from 2 w to 3 w input power. figure 6 shows the demonstration board?s measured efficiency at light load, comparing it with requirements coming from the reference energy star ? document. figure 6. light-load efficiency measurements epa rev. 5.0 computers power supply compliance as indicated in ta bl e 3 , this converter is also compliant with the newer, most stringent ?epa rev. 5.0 computers? limits for active-load efficiency. this latest energy star ? document, whose effective date is july 2009, introduces a new method of testing the energy performance of comp uters. it sets a limitation on typical energy consumption (tec) of computers which is a va lue for typical annual electricity use, by measurements of average operational mode power levels scaled by an assumed typical usage model (duty cycle). this new approach, like the previous one, does not establish direct limits to the power supply minimum effi ciency for each different state. in fact it depends on the actual load applied by computer itself. at the moment this application note has been written, not all the major computer manufacturers have produced specific requirements for epa rev. 5.0 compliant designs. anyway, the good margin achieved against the epa rev. 4.0 limits proves that this board can be a viable solution even for upcoming epa 5 computer designs. ? 50% 55% 60% 65% 70% 75% 80% 85% 90% 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 pin [w] efficiency [%] 230v-50hz 115v-60hz ep a4 table 3. overall efficiency compared to ?epa rev. 5.0 computers? notes 230v-50hz 115v-60hz epa5 vout [v] iout [ma] pout [w] pin [w] eff. vout [v] iout [ma] pout [w] pin [w] eff. 20% load eff. 19.12 785 15.02 18.17 82.6% 19.10 785 14.99 17.39 86.2% 82.0% pass 50% load eff. 19.13 1960 37.50 42.87 87.5% 19.11 1963 37.52 42.12 89.1% 85.0% pass 100% load eff. 19.15 3917 75.01 84.07 89.2% 19.14 3920 75.00 85.26 88.0% 82.0% pass
AN2941 harmonic content measurement doc id 15447 rev 4 15/37 3 harmonic content measurement the board has been tested according to the european regulation en 61000-3-2 class-d and japanese regulation jeita-miti class-d, at both the nominal input voltage mains. as shown in figure 7 and 8 , the circuit is able to reduce the harmonics well below the limits of both regulations. at the bottom of the diagrams the total harmonic distortion and power factor have been measured too. the values in all conditions give a clear idea of the correct function of the pfc. figure 7. evl6566a-75wes4 compliance to en61000-3-2 standard at 230 vac-50 hz, full load figure 8. evl6566a-75wes4 compliance to jeita-miti standard at 100 vac-50 hz, full load thd = 5.95% - pf = 0.978 thd = 4.52% - pf = 0.991 ? 0.0001 0.001 0.01 0.1 1 1 3 5 7 9 111315171921232527293133353739 harmonic order [n] har mon ic cu rrent [a] me asur ed va lu e en61000-3-2 cl a ss-d l i mi ts ? 0.000 1 0.00 1 0.0 1 0.1 1 1 3 5 7 9 11 1315 17192123252729313335 3739 harm on ic or de r [n ] har monic current [a] me asure d va l ue jei da-mit i cl a ss-d l i mi ts
functional check AN2941 16/37 doc id 15447 rev 4 4 functional check the following figures show some flyback waveforms during steady-state operation and the l6563s tbo function is depicted, setting di fferent pfc output voltages according to the mains input voltage. at nominal load conditions, in figure 9 and figure 10 , we note that the zcd negative-going edge triggers the mosfet's turn-on, allowing quasi-resonant operation. figure 11 and figure 12 show operation at 20 w. as in dicated before, maximum switching frequency has been set at 125 khz. for this reason, the l6566a skips the first valley signal on zcd and switches on the mosfet at the second negative-going edge. figure 9. flyback stage waveforms at 115 v-60 hz - full load figure 10. flyback stage waveforms at 230 v -50 hz - full load ch1: drain voltage ch2: cs pin voltage ch3: zcd pin ch4: pfc output ch1: drain voltage ch2: cs pin voltage ch3: zcd pin ch4: pfc output figure 11. flyback stage waveforms at 115 v-60 hz - 20 w load figure 12. flyback stage waveforms at 230 v -50 hz - 20 w load ch1: drain voltage ch2: cs pin voltage ch3: zcd pin ch4: pfc output ch1: drain voltage ch2: cs pin voltage ch3: zcd pin ch4: pfc output
AN2941 functional check doc id 15447 rev 4 17/37 standby and no-load operation in figure 13 and figure 14 , some no-load waveforms are given. as shown, the l6566a works in burst mode. when the feedback voltage at pin comp falls below 2.65 v (typical), the ic is disabled and its consumption is reduced. the chip is re-enabled as the voltage on pin comp rises again over this threshold. addi tionally, in order to get the best efficiency, during light-load operation the pfc stage is turned off. in fact when the voltage on pin comp falls below the burst mode threshold, the l6566a pin #6 (vcc_pfc) supplying the pfc controller, is opened. thus the residual consumption of the pfc control circuitry is minimized to a negligible level. whenever the ic is shut down, either latched or not, the vcc_pfc pin is open as well. in figure 15 and figure 16 the transitions from full load to no load and vice versa at maximum input voltage have been checked. the maximum input voltage has been chosen because it is the most critical input voltage fo r transition. in fact at no load the burst pulses have lower repetition frequency and vcc could dr op, causing restart cycles of the controller. as visible in the graphs, both transitions are clean and there isn't any output voltage or vcc dip. figure 13. no-load operation at 90 v-60 hz figure 14. no-load operation at 265 v-50 hz ch1: flyback drain ch2: comp pin ch3: output voltage ch4: pfc drain ch1: flyback drain ch2: comp pin ch3: output voltage ch4: pfc drain
functional check AN2941 18/37 doc id 15447 rev 4 overcurrent and short-circuit protection in this demonstration boar d the overcurrent is managed by tsm1014 (u5), a cc/cv controller. inside the ic there are a voltage reference and two or-ed operational amplifiers, one dedicated to act as the error amplifier of the voltage loop, the second is dedicated to act as the error amplifier of the current loop. duri ng normal operation the voltage feedback loop is working while, in case the output current exceeds the programmed value, the current loop error amplifier takes over, thus keeping constant the output current. in case of a dead-short, the current cannot be limited effectively by u5 because the output voltage drops so it is not powered, therefore the primary controller must manage the failure condition. in case of output short, there are two differen t possible situations that the controller has to handle. if the coupling between the secondary winding and the auxiliary winding is good enough, as so on as the output voltage drops, the auxiliary voltage drops as well and the ic supply voltage falls below the undervoltage lockout threshold, causing the l6566a to disable. the controller stops switching and remains in the off-state until the voltage on the vcc pin decreases below the vcc restart threshold (5 v). then, the hv startup turns on and charges the vcc capacitor. as soon as the turn- on threshold is reached, the circuit restarts. if the short is still there, the circuit just attemp ts to restart but it stop s in a few milliseconds. restart attempts are repeated indefinitely, until the short is removed. this provides a very low frequency hiccup working mode (for this board 0.5 hz), limiting the current flowing at secondary side (less than 1 arms) preventing the power supply from overheating, which could destroy it. in case the leakage in ductance between auxiliary and sec ondary winding is not negligible, some spikes on the auxiliary voltage could ke ep vcc above the uvlo threshold for a time long enough to damage the converter. in this case l6566a detects a short-circuit monitoring the control pins. when the output voltage drops and consequently pin comp saturates high, the soft-start capa citor is charged by an internal cu rrent source. when the vss voltage reaches an internal disable threshold (5 v), the controlle r stops switching and starts operating in hiccup mode as described above. figure 15. transition full load to no load at 265 vac-50 hz figure 16. transition no load to full load at 265 vac-50 hz ch1: drain voltage ch2: vcc ch3: output voltage ch4: output current ch1: drain voltage ch2: vcc ch3: output voltage ch4: output current
AN2941 functional check doc id 15447 rev 4 19/37 in figure 18 we can see that, in this case, the ic supply voltage dr ops to the uvlo threshold (10 v) causing controller turn-off before the ss pin signal attains the disable threshold (5 v). this happens because the tr ansformer leakage inductance is very low and as soon as the output voltag e drops, the auxiliary voltag e drops immediately as well. furthermore from the graph we can note th at, during the ss voltage ramp-up, the transferred power is limited. overvoltage and open loop protection the evl6566a-75wes4 board implements two different open loop protections, one for each stage. the pfc controller l6563s is equipped with an ovp monitoring the output voltage by the pfc_ok (#7) pin with a resistor divider (r3, r5, r11 high, r10 and r19 low). this divider is selected so that the voltage at the pin reache s 2.5 v if the output voltage exceeds a preset value (455 v in this case). when this function is triggered, the gate drive activity is immediately stopped and it restarts as the voltage on the pin falls below 2.4 v. this function protects the bulk capacitor from voltage surg es caused by abrupt load/line changes or startup overshoot. because, in this case no failure occurred, the controller restarts as the output voltage falls below the overvoltage threshold. however, if the voltage on pin inv falls below 1.66 v (typ.) a feedback failure is assume d. in this case the device is latched off. normal operation can be resumed only by cycling vcc, bringing its value lower than 6 v, before moving up to turn-on threshold. at the same time the pin pwm_latch (pin #8) is asserted high. this pin is an open source output intended for tripping a latched shutdown function of the pwm controller ic in the cascaded dc-dc converter, so that the entire unit is latched off. on this board the pwm_latch is connected to the dis pin of the l6566a. figure 17. short-circuit at full load and 230 vac - 50 hz figure 18. short-circuit details at full load and 230 vac - 50 hz ch1: gate voltage ch2: vcc ch3: ss pin voltage ch4: output current ch1: drain voltage ch2:vcc ch3: ss pin voltage ch4: output current
functional check AN2941 20/37 doc id 15447 rev 4 to restart the system the input power must be recycled. additionally, if the voltage on pin pfc_ok is tied below 0.23 v, the l6563s is shut down. in this case both pwm_stop and pwm_latch ke ep their high impedance status. to restart the ic simply let the voltage at the pin go above 0.27 v. this function can be used as a remote on/off control input. note that this function offers a complete protection against not only feedback loop failures or erroneous settings, but also against a failure of the protection itself. if either resistor of the pfc_ok divider fails short or opens or the pf c_ok (#7) pin is floa ting, this results in shutting down the l6563s and stopping the controller operation of the flyback stage. the event of an open loop is given in figure 19 . we can notice the protection intervention stopping the operation of the l6563s and the activation of the pwm_latch pin that is connected to the l6566a pin #7 (dis). this function of th e l6566a is a latched device shutdown. internally the pin connects a comp arator that, when the voltage on the pin exceeds 4.5 v, shuts down the ic and brings its consumption to a value barely higher than before startup. the internal l6566a logic opens also the pin vcc_pfc, therefore the l6563s remains inactive after latching because it is no longer powered. this state is latched and the input power must be recycled in order to restart the ic. the latch is removed as the voltage on the ac _ok goes below the brownout threshold. the flyback stage is also protected against open loop conditions that lead to losing control of the output voltage. the l6566a ovp function monitors the voltag e on the zcd pin (#11) during the mosfet's off-time, during which the voltag e generated by the auxiliary wind ing is proportional to the converter's output voltage. if the voltage on the pin exceeds an internal 5 v reference, an overvoltage condition is assumed and the device is shut down. an internal current generator is activated that sources 1 ma out of the vff pin (#15). if the vff voltage is allowed to reach 2 vbe over 5 v, the l6566a is latched off ( figure 20 ). as soon as the ic is latched, vcc starts decreasing until it reaches a value 0.5 v below the turn-on threshold. then the figure 19. evl6566-75wes4 pfc open loop at 115 vac-60 hz - full load ch1: drain voltage ch2: pfc output voltage ch3: pfc_ok pin voltage ch4: pwm_latch pin voltage
AN2941 functional check doc id 15447 rev 4 21/37 hv startup circuit turns on and begins to operate periodically in order to keep vcc between vccon and vccon-0.5 v ( figure 21 ) maintaining the ic latched. if r37 is shorted, the impedance externally connected to pin #15 (vff) is lower and the voltage in case of ovp cannot reach the 5+ 2vbe threshold, so th e l6566a restarts after vcc has dropped below 5 v ( figure 22 ). in case of l6566a ovp intervention, the l6563s operation is also stopped because the l6566a stops the pfc via the vcc_pfc pin. additionally, to improve the immunity against temporary disturbances (needed for example in case of immunity tests), an internal logic activates the protection after the ovp has been detected for 4 consecutive switching cycles. figure 20. flyback open loop at 230 v-50 hz half load figure 21. flyback open loop at 230 v-50 hz half load ch1: vff voltage ch2: vcc ch3: zcd voltage ch4: output voltage ch1: vff voltage ch2: vcc ch3: zcd voltage ch4: output voltage figure 22. flyback open loop - restart option 230 vac 50 hz - half load ch1: vff voltage ch2: vcc ch3: zcd voltage ch4: output voltage
functional check AN2941 22/37 doc id 15447 rev 4 in the following table the output voltage at ovp intervention are given. the measures therefore demonstrate that, as previously explai ned, the l6566a sensing technique provides a very stable ovp intervention threshold over the entire mains voltage and load ranges. table 4. output voltage at ovp intervention vs. input voltage and output power input voltage output power output voltage at ovp intervention 115 v 75 w 20.45 v 115 v 35 w 20.36 v 115 v 0 w 20.74 v 230 v 75 w 20.61 v 230 v 35 w 20.55 v 230 v 0 w 20.83 v
AN2941 thermal map doc id 15447 rev 4 23/37 5 thermal map in order to check the design reliability, a thermal mapping by means of an ir camera was done. figure 23 and 24 show the thermal measures of the board, component side, at nominal input voltage. some pointers visible on the pictures have been placed across key components or components showing high temperature. the ambient temperature during both measurements was 27 c. all other components of the board are working within the temperature limits, assuring a reliable long-term operation of the power supply. figure 23. thermal map at 115 vac-60 hz - full load figure 24. thermal map at 230 vac-50 hz - full load table 5. thermal maps reference points point reference description a d6 output rectifier b t1 flyback power transformer c d4a flyback transformer clamping transil d q5 flyback switch e d2 input bridge rectifier f q2 pfc switch ? c 90.0 81.3 72. 5 63. 8 55.0 46.3 37. 5 28. 8 20.0 ? c 90 . 0 81 . 3 72 . 5 63 . 8 55 . 0 46 . 3 37 . 5 28 . 8 20 . 0
conducted emission pre-compliance test AN2941 24/37 doc id 15447 rev 4 6 conducted emission pre-compliance test figure 25 and 26 show the average measurement of the conducted noise at full load and nominal mains voltages. the limits shown in the diagrams are from en55022 class-b, which is the most popular regulation for domestic equipment and it has more stringent limits compared to those of class-a, dedicated to it equipment. as visible in the diagrams, in all test conditions the measures are within the limits. figure 25. ce average measure at 115 vac and full load figure 26. ce average measure at 230 vac and full load
bill of material AN2941 25/37 doc id 15447 rev 4 7 bill of material table 6. bill of material des. part type / part value description supplier case style / package c1 2n2f y1 - safety cap. de1e3kx222m murata dwg c2 2n2f y1 - safety cap. de1e3kx222m murata dwg c3 330nf x2 - flm cap - r46-i 3470--m1- arcotronics dwg c5 470nf - 400v 400v - flm cap - b32653a4474 epcos dwg c6 100f - 450v 450v - aluminium elcap - lls series - 85c nippon-chemicon 25x25 mm c7 2n2f y1 - safety cap. de1e3kx222m murata dwg c8 1nf 200v cercap - general purpose avx 1206 c9 100nf 50v cercap - general purpose avx 0805 c10 1nf 50v cercap - general purpose avx 1206 c11 1nf 50v cercap - general purpose avx 1206 c12 1000f - 25v 25v - aluminium elcap - zl series - 105c rubycon dwg c13 100f - 25v 25v - aluminium elcap - yxf series - 105c rubycon dwg c14 220nf 50v cercap - general purpose avx 1206 c15 1f 25v cercap - general purpose avx 0805 c16 1000uf - 25v 25v - aluminium elcap - zl series - 105c rubycon dwg c17 100nf 50v cercap - general purpose avx 0805 c18 220nf 100v cercap - general purpose avx 1206 c19 2n2f 50v cercap - general purpose avx 1206 c20 2n2f 50v cercap - general purpose avx 1206 c21 1uf 25v cercap - general purpose avx 0805 c22 22pf - 2kv 2kv cap - dea1x3d220jc1b murata 5mm c23 100nf 50v cercap - general purpose avx 0805
AN2941 bill of material doc id 15447 rev 4 26/37 des. part type / part value description supplier case style / package c24 2n2f y1 - safety cap. de1e3kx222m murata dwg c25 220pf 50v cercap - general purpose avx 0805 c26 22nf 50v cercap - general purpose avx 0805 c30 2n2f 50v cercap - general purpose avx 1206 c31 1n8f 50v cercap - general purpose avx 0805 c32 100nf 50v cercap - general purpose avx 1206 c33 100uf - 50v 50v - aluminium elcap - yxf series - 105c rubycon dwg c34 47nf 50v cercap - general purpose avx 1206 c35 470nf 50v cercap - general purpose avx 0805 c36 100nf 50v cercap - general purpose avx 0805 c37 47pf 50v cercap - general purpose avx 1206 c38 330pf 50v cercap - general purpose avx 0805 c39 100nf 50v cercap - general purpose avx 1206 c40 10nf 50v cercap - general purpose avx 1206 c41 330pf 50v cercap - general purpose avx 1206 c43 2n2f 50v cercap - general purpose avx 1206 c44 1nf 50v cercap - general purpose avx 0805 c201 4n7f 50v cercap - general purpose avx pth d1 1n4005 rectifier - general purpose vishay do-41 d2 gbu4j single phase bridge rectifier vishay gbu style d3 stth2l06 ultrafast high voltage rectifier stmicroelectronics do-41 d4a 1.5ke300a transil stmicroelectronics do - 201 d5 stps20h100cfp high voltage power schottky rectifier stmicroelectronics to - 220fp d6 s07m high voltage rectifier vishay sma d7 stps20h100cfp high voltage power schottky rectifier stmicroelectronics to - 220fp table 6. bill of material (continued)
bill of material AN2941 27/37 doc id 15447 rev 4 des. part type / part value description supplier case style / package d8 stth108a high voltage ultrafast rectifier stmicroelectronics sma d9 ll4148 fast switching diode vishay minimelf d10 ll4148 fast switching diode vishay minimelf d11 stth102 fast switching diode stmicroelectronics do-41 d16 ll4148 fast switching diode vishay minimelf d17 bzv55-b18 zener diode philips minimelf f1 fuse 4a fuse t4a - time delay wichmann dwg hs1 heat-sink dwg hs2 heat-sink dwg hs3 heat-sink dwg j1 mkds 1,5/ 3-5,08 pcb term. block, screw conn., pitch 5mm - 3 w. phoenix contact dwg j2 mkds 1,5/ 2-5,08 pcb term. block, screw conn., pitch 5mm - 2 w. phoenix contact dwg l1 hf2422-203y1r0-t01 input emi filter tdk dwg l2 srw25cq-t05v102 pfc inductor tdk dwg l3 tsl0709 - 1r5m4r3-pf 1u5f - radial inductor tdk dwg q2 stf7nm50 n-channel power mosfet stmicroelectronics to-220fp q3 bc847c npn small signal bjt zetex sot-23 q5 stf7nm80 n-channel power mosfet stmicroelectronics to-220fp q10 bc847c npn small signal bjt zetex sot-23 q11 bc847c npn small signal bjt zetex sot-23 r1 2r5 ntc resistor - s237 epcos dwg r3 2m2 smd standard film res - 1/4w - 1% - 100ppm/c vishay 1206 r4 680k smd standard film res - 1/8w - 1% - 100ppm/c vishay 0805 r5 2m2 smd standard film res - 1/4w - 1% - 100ppm/c vishay 1206 r7 3m3 smd standard film res - 1/4w - 1% - 100ppm/c vishay 1206 table 6. bill of material (continued)
AN2941 bill of material doc id 15447 rev 4 28/37 des. part type / part value description supplier case style / package r8 47k smd standard film res - 1/8w - 1% - 100ppm/c vishay 0805 r10 27k sfr25 axial stand. film res - 0.4w - 1% - 100ppm/c vishay pth r11 2m2 sfr25 axial stand. film res - 0.4w - 1% - 100ppm/c vishay pth r12 3m3 smd standard film res - 1/4w - 1% - 100ppm/c vishay 1206 r13 180k smd standard film res - 1/4w - 1% - 100ppm/c vishay 1206 r14 3r9 smd standard film res - 1/4w - 5% - 250ppm/c vishay 1206 r17 62k smd standard film res - 1/8w - 5% - 250ppm/c vishay 0805 r18 56k smd standard film res - 1/4w - 5% - 250ppm/c vishay 1206 r19 9k1 smd standard film res - 1/4w - 1% - 100ppm/c vishay 0805 r21 330k smd standard film res - 1/8w - 5% - 250ppm/c vishay 0805 r22 r015 smd film res 1w - 2512 msr1 meggit 2512 r23 27r smd standard film res - 1/4w - 5% - 250ppm/c vishay 1206 r24 100k smd standard film res - 1/8w - 5% - 250ppm/c vishay 0805 r25 470r sfr25 axial stand. film res - 0.4w - 5% - 250ppm/c vishay pth r26 1mb smd standard film res - 1/8w - 1% - 100ppm/c vishay 0805 r27 0r33 sfr25 axial stand. film res - 0.4w - 5% - 250ppm/c vishay pth r29 47k smd standard film res - 1/8w - 5% - 250ppm/c vishay 0805 r30 15k smd standard film res - 1/4w - 5% - 250ppm/c vishay 1206 r31 43k smd standard film res - 1/4w - 5% - 250ppm/c vishay 1206 r32 15k smd standard film res - 1/4w - 5% - 250ppm/c vishay 1206 r33 6k8 smd standard film res - 1/8w - 5% - 250ppm/c vishay 0805 r34 1mb smd standard film res - 1/8w - 1% - 250ppm/c vishay 0805 r35 8r2 smd standard film res - 1/8w - 5% - 250ppm/c vishay 0805 r36 62k smd standard film res - 1/4w - 1% - 100ppm/c vishay 1206 r37 10k sfr25 axial stand. film res - 0.4w - 5% - 250ppm/c vishay pth table 6. bill of material (continued)
bill of material AN2941 29/37 doc id 15447 rev 4 des. part type / part value description supplier case style / package r39 56k smd standard film res - 1/8w - 1% - 100ppm/c vishay 0805 r42 16k smd standard film res - 1/4w - 1% - 100ppm/c vishay 1206 r45 2k2 smd standard film res - 1/8w - 5% - 250ppm/c vishay 0805 r46 33r smd standard film res - 1/8w - 5% - 250ppm/c vishay 0805 r47 100k smd standard film res - 1/8w - 5% - 250ppm/c vishay 0805 r48 4k7 smd standard film res - 1/8w - 1% - 100ppm/c vishay 0805 r49 24k smd standard film res - 1/8w - 1% - 100ppm/c vishay 0805 r50 2k7 sfr25 axial stand. film res - 0.4w - 5% - 250ppm/c vishay pth r51 1k0 smd standard film res - 1/8w - 5% - 250ppm/c vishay 0805 r52 0r47 sfr25 axial stand. film res - 0.4w - 5% - 250ppm/c vishay pth r53 0r33 sfr25 axial stand. film res - 0.4w - 5% - 250ppm/c vishay pth r54 560k smd standard film res - 1/8w - 5% - 250ppm/c vishay 0805 r55 22r smd standard film res - 1/4w - 5% - 250ppm/c vishay 1206 r57 1k smd standard film res - 1/4w - 5% - 250ppm/c vishay 1206 r58 m57703 thermistor - b57703m103g epcos dwg r59 12k sfr25 axial stand. film res - 0.4w - 1% - 100ppm/c vishay pth r62 4k7 smd standard film res - 1/4w - 1% - 100ppm/c vishay 1206 r63 100k smd standard film res - 1/4w - 1% - 100ppm/c vishay 1206 r65 22k smd standard film res - 1/8w - 1% - 100ppm/c vishay 0805 r66 3r9 smd standard film res - 1/4w - 5% - 250ppm/c vishay 1206 r67 12k smd standard film res - 1/8w - 1% - 100ppm/c vishay 0805 r68 220k smd standard film res - 1/4w - 1% - 100ppm/c vishay 1206 r69 1k0 smd standard film res - 1/4w - 1% - 100ppm/c vishay 1206 r75 1k8 smd standard film res - 1/8w - 5% - 250ppm/c vishay 0805 r76 4k7 smd standard film res - 1/8w - 5% - 250ppm/c vishay 0805 table 6. bill of material (continued)
AN2941 bill of material doc id 15447 rev 4 30/37 des. part type / part value description supplier case style / package r77 100k smd standard film res - 1/8w - 5% - 250ppm/c vishay 0805 r78 560r smd standard film res - 1/4w - 5% - 250ppm/c vishay 1206 r80 1k8 smd standard film res - 1/4w - 5% - 250ppm/c vishay 1206 t1 srw32ec-t01h114 power transformer tdk dwg u1 l6563s transition-mode pfc controller stmicroelectronics so-14 u3 sfh617a-4 optocoupler infineon dip4-10.16mm u5 tsm1014aist low consumption cc/cv c ontroller stmicroelectronics mini so-8 u6 l6566a multi-mode pwm controller stmicroelectronics so-16n table 6. bill of material (continued)
AN2941 pfc coil specifications doc id 15447 rev 4 31/37 8 pfc coil specifications general description and characteristics application type: consumer, home appliances transformer type: open coil former: vertical type, 5+3 pins max. temp. rise: 45 c max. operating ambient temperature: 60 c mains insulation: n.a. unit finishing: varnished electrical characteristics converter topology: boost, transition mode core type: cq25-pc47 min. operating frequency: 20 khz typical operating frequency: 80 khz primary inductance: 400 h10% at 1 khz-0.25 v (a) peak primary current: 3.5 a pk rms primary current: 1.2 a rms electrical diagram and winding characteristics figure 27. pfc coil electrical diagram a. measured between pins #5 and #6 table 7. pfc coil winding data pins windings rms current number of turns wire type 8 - 3 aux (1) 1. aux winding is wound on coil former before primary wi nding. to be insulated with a layer of polyester tape. 0.05 a rms 5 spaced 0.28 mm 5 - 6 primary (2) 2. primary winding external insulati on: 2 layers of polyester tape. 1.2 a rms 50 multistrand 10 x 0.20 mm ? 5 6 prim. aux 8 3
pfc coil specifications AN2941 32/37 doc id 15447 rev 4 mechanical aspect and pin numbering maximum height from pcb: 20 mm coil former type: vertical, 5+3 pins pins #1, 2, 4, 7 are removed external copper shield: not in sulated, wound around the fe rrite core including the coil former. height is 7 mm. connected to pin #3 by a solid wire. manufacturer tdk electronics europe - germany inductor p/n: 25cq-t05 figure 28. pfc coil mechanical aspect
AN2941 transformer specifications doc id 15447 rev 4 33/37 9 transformer specifications general description and characteristics application type: consumer, home appliances transformer type: open coil former: horizontal type, 9+9 pins max. temp. rise: 45 c max. operating ambient temperature: 60 c mains insulation: according to en60950 unit finishing: varnished electrical characteristics converter topology: flyback, ccm/dcm mode core type: eer34-pc47 min. operating frequency: 20 khz typical operating frequency: 100 khz primary inductance: 550 h 10% at 1 khz-0.25 v (b) leakage inductance: 17 h max at 100 khz-0.25 v (c) peak primary current: 2.65 a pk rms primary current: 0.78 a rms electrical diagram and winding characteristics figure 29. transforme r electrical diagram b. measured between pins (2, 3)-(5, 6) c. measured between pins (2 , 3)-(5, 6) with all secondary windings shorted ? 8 9 aux 10 \ 11 15 \ 16 +19v 5 2 prim. ? a 6 3 prim. ? b
transformer specifications AN2941 34/37 doc id 15447 rev 4 figure 30. transformer winding cross view table 8. transformer winding data (1) 1. all terminal wires have to be insulated with tubes pins winding rms current number of turns number of layers wire type 5-6 aux 0.05 a rms 7 spaced 1 g2 0.23 mm 3-1 primary - a (2) 2. primaries a and b are in parallel 0.39 a rms 60 2 g2 2 x 0.23 mm 8-10 19 v 5.2 a rms 81 multistrand g2 4 x 0.64 mm 4-2 primary - b 0.39 a rms 60 2 g2 2 x 0.23 mm
AN2941 transformer specifications doc id 15447 rev 4 35/37 mechanical aspect and pin numbering maximum height from pcb: 30 mm coil former type: horizontal, 9+9 pins (pin 2 removed) pin distance: 4 mm row distance: 35 mm external copper shield: not in sulated, wound around the fe rrite core including the coil former. height is 12 mm. manufacturer tdk electronics europe - germany transformer p/n: srw32ec-t01h114 figure 31. transforme r mechanical aspect
revision history AN2941 36/37 doc id 15447 rev 4 10 revision history table 9. document revision history date revision changes 19-may-2009 1 initial release 25-may-2009 2 updated figure 2 and figure 3 18-sep-2009 3 updated figure 8 and ta b l e 6 29-nov-2010 4 updated chapter 4 and figure 2
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